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Technoclinic > LAPTOPS > IBM’s New Tech Squeezes 30 Billion Transistors Into Fingernail-Sized 5nm Chip
LAPTOPS

IBM’s New Tech Squeezes 30 Billion Transistors Into Fingernail-Sized 5nm Chip

Loknath Das
Last updated: 2017/06/10 at 5:09 PM
Loknath Das
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IBM's New Tech Squeezes 30 Billion Transistors Into Fingernail-Sized 5nm Chip

HIGHLIGHTS

  • IBM has developed a new tech to make 5nm chips
  • It will allow 30 billion transistors to be placed on a single chip
  • It makes the use of Extreme Ultraviolet Lithography (EUV)

IBM and its chip manufacturing partner companies Samsung and Globalfoundries still believe in Moore’s Law, and have just announced a new procedure to make silicon nanosheet transistors that will enable 5-nanometre chips. Furthermore, the technology can be deployed to affix 30 billion transistor switches into a single chip equal to a fingernail in size. The process details will be presented at the 2017 Symposia on VLSI Technology and Circuits conference to be held in Japan, IBM says.

The world’s first 7-nanometre chip was introduced in 2015 by IBM in a chip industry predominantly occupied by 10-nanometre and 14-nanometre chips. Along with the 7nm chips, a new approach to producing transistor chips came into existence – the extreme ultraviolet lithography (EUV). Continuing the same approach, the new 5nm chip will be produced, however, forgoing the standard FinFET architecture and using stacks of silicon nanosheets instead – called nanosheet transistor architecture.

5nm chip fingernail flickr 5nm Chip

Photo Credit: IBM

With EUV and nanosheet transistor architecture technique, IBM says the width of the nanosheets can be adjusted continuously within a single manufacturing process. This will help fine-tuning of performance and power for specific circuits under the 5nm technology. Unlike the 7nm chip covering 20 billion transistors on a chip, the 5nm will let 30 billion transistors to be fitted on a single microprocessor.

IBM says that its new 5nm chip technology will deliver 40 percent performance enhancement at a fixed power, or 75 percent power savings at matched performance for the future devices in favour of demands of artificial intelligence (AI) systems, virtual reality, and mobile devices. Talking specifically about mobile phones, the company is hoping to bring a change in the power consumption method prevalent presently. “The resulting increase in performance will help accelerate cognitive computing, the Internet of Things (IoT), and other data-intensive applications delivered in the cloud. The power savings could also mean that the batteries in smartphones and other mobile products could last two to three times longer than today’s devices, before needing to be charged,” explains the company in its press release.

While things look promising, don’t raise hopes to see them soon enough in the devices that will possibly be shipped in near future. The 7nm-technology chips were launched almost two years back and we are yet to see them shipping until 2018 presumably. As far as the technological advancement of the silicon chips is concerned, IBM has just taken us into a new horizon, which can be undoubtedly backed by IBM’s recent investments in R&D and artificial intelligence domains.

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Tags: IBM, 5 Nanometre Chip, IBM 5 Nanometre Chip, Science
[“Source-ndtv”]
TAGGED: 30, 5nm, Billion, Chip, Fingernail-Sized, IBM's, Into, New, Squeezes, Tech, Transistors

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Loknath Das June 10, 2017
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